' Gambas module file
Library "libcpuid:14"
Public Struct cpu_id_t
vendor_str[64] As String
brand_str[64] As String
vendor As String
flags[256] As Byte
family As Integer
model As Integer
stepping As Integer
ext_family As Integer
ext_model As Integer
num_cores As Integer
num_logical_cpus As Integer
total_logical_cpus As Integer
l1_data_cache As Integer
l1_instruction_cache As Integer
l2_cache As Integer
l3_cache As Integer
l4_cache As Integer
l1_assoc As Integer
l2_assoc As Integer
l3_assoc As Integer
l4_assoc As Integer
l1_cacheline As Integer
l2_cacheline As Integer
l3_cacheline As Integer
l4_cacheline As Integer
cpu_codename[64] As String
sse_size As Integer
detection_hints[128] As Byte
End Struct
Private cpu_id_t As New Cpu_id_t
'Private Extern cpu_id_t(info As Cpu_id_t) As Integer
Public Sub Main()
Dim si As New Cpu_id_t
Print si.l1_assoc
End
' Gambas module file
Library "libc:6"
Public Struct sysinfo
uptime As Long
loads[3] As Long
totalram As Long
freeram As Long
sharedram As Long
bufferram As Long
totalswap As Long
freeswap As Long
procs As Short
pad As Short
totalhigh As Long
freehigh As Long
mem_unit As Integer
End Struct
' int sysinfo (struct sysinfo *__info)
' Returns information on overall system statistics.
Private Extern sysinfo(info As Sysinfo) As Integer
Public Logs As New Logger
Public Sub Main()
Dim si As New Sysinfo
Dim err As Integer
err = sysinfo(si)
If err < 0 Then
Logs("Libc6 Sysinfo Error", Logger.Error)
Else
Finfosys.TextBox58.Text = "Uptime: " & Date(0, 0, 0, 0, 0, 0, CInt(si.uptime * 1000))
Endif
EndThat's why the code below work?
You can help me write it correctly?Yes, I can.
Public Struct cpu_id_t
vendor_str[16] As Byte
brand_str[64] As Byte
vendor As Integer
flags[128] As Byte
family As Integer
model As Integer
stepping As Integer
ext_family As Integer
ext_model As Integer
num_cores As Integer
num_logical_cpus As Integer
total_logical_cpus As Integer
l1_data_cache As Integer
l1_instruction_cache As Integer
l2_cache As Integer
l3_cache As Integer
l4_cache As Integer
l1_assoc As Integer
l2_assoc As Integer
l3_assoc As Integer
l4_assoc As Integer
l1_cacheline As Integer
l2_cacheline As Integer
l3_cacheline As Integer
l4_cacheline As Integer
cpu_codename[64] As Byte
sse_size As Integer
detection_hints[16] As Byte
End Struct' Gambas module file
Library "libcpuid:14"
Public Struct cpu_id_t
vendor_str[16] As Byte
brand_str[64] As Byte
vendor As Integer
flags[128] As Byte
family As Integer
model As Integer
stepping As Integer
ext_family As Integer
ext_model As Integer
num_cores As Integer
num_logical_cpus As Integer
total_logical_cpus As Integer
l1_data_cache As Integer
l1_instruction_cache As Integer
l2_cache As Integer
l3_cache As Integer
l4_cache As Integer
l1_assoc As Integer
l2_assoc As Integer
l3_assoc As Integer
l4_assoc As Integer
l1_cacheline As Integer
l2_cacheline As Integer
l3_cacheline As Integer
l4_cacheline As Integer
cpu_codename[64] As Byte
sse_size As Integer
detection_hints[16] As Byte
End Struct
Private cpu_id_t As New Cpu_id_t
'Private Extern cpu_id_t(info As Cpu_id_t) As Integer
Public Sub Main()
Dim si As New Cpu_id_t
Print si.l1_assoc
Print si.sse_size
Print si.vendor
End
What's the exact external Function that inizializes the Structure ?
'Private Extern cpu_id_t(info As Cpu_id_t) As Integer
#include <stdio.h>
#include <libcpuid.h>
int main(void)
{
if (!cpuid_present()) { // check for CPUID presence
printf("Sorry, your CPU doesn't support CPUID!\n");
return -1;
}
struct cpu_raw_data_t raw;
struct cpu_id_t data; // contains recognized CPU features data
if (cpuid_get_raw_data(&raw) < 0) { // obtain the raw CPUID data
printf("Sorry, cannot get the CPUID raw data.\n");
printf("Error: %s\n", cpuid_error()); // cpuid_error() gives the last error description
return -2;
}
if (cpu_identify(&raw, &data) < 0) { // identify the CPU, using the given raw data.
printf("Sorrry, CPU identification failed.\n");
printf("Error: %s\n", cpuid_error());
return -3;
}
struct cpu_mark_t mark;
cpu_tsc_mark(&mark);
cpu_tsc_unmark(&mark);
printf("{\n");
printf(" \"VENDOR_STR\": \"%s\",\n", data.vendor_str); //
printf(" \"CPU_CODENAME\": \"%s\",\n", data.cpu_codename); //
printf(" \"BRAND_STR\": \"%s\",\n", data.brand_str); //
printf(" \"NUM_CORES\": \"%d\",\n", data.num_cores); //
printf(" \"NUM_LOGICAL_CPUS\": \"%d\",\n", data.num_logical_cpus); //
printf(" \"TOTAL_LOGICAL_CPUS\": \"%d\",\n", data.total_logical_cpus); //
printf(" \"FAMILY\": \"%d\",\n", data.family); //
printf(" \"MODEL\": \"%d\",\n", data.model); //
printf(" \"STEPPING\": \"%d\",\n", data.stepping); //
printf(" \"EXT_FAMILY\": \"%d\",\n", data.ext_family); //
printf(" \"EXT_MODEL\": \"%d\",\n", data.ext_model); //
printf(" \"CPU_CLOCK\": \"%d MHz\",\n", cpu_clock()); //
printf(" \"CPU_CLOCK_BY_OS\": \"%d MHz\",\n", cpu_clock_by_os()); //
printf(" \"CPU_CLOCK_BY_IC\": \"%d MHz\",\n", cpu_clock_by_ic(25, 16)); //
printf(" \"CPU_CLOCK_MEASURE\": \"%d MHz\",\n", cpu_clock_measure(400, 1));//
printf(" \"MARK_TSC\": \"%llu\",\n", mark.tsc); //
printf(" \"MARK_SYS_CLOCK\": \"%llu\",\n", mark.sys_clock); //In C it looks like this:
.......
How to move to the code gambas?
Library "libcpuid:14"
Public Struct cpu_raw_data_t ' but we could replace this Structure by an allocated memory area by using Alloc( ) function
basic_cpuid[32, 4] As Integer
ext_cpuid[32, 4] As Integer
intel_fn4[4, 4] As Integer
intel_fn11[4, 4] As Integer
End Struct
Public Struct cpu_id_t
vendor_str[16] As Byte
brand_str[64] As Byte
vendor As Integer
flags[128] As Byte
family As Integer
model As Integer
stepping As Integer
ext_family As Integer
ext_model As Integer
num_cores As Integer
num_logical_cpus As Integer
total_logical_cpus As Integer
l1_data_cache As Integer
l1_instruction_cache As Integer
l2_cache As Integer
l3_cache As Integer
l4_cache As Integer
l1_assoc As Integer
l2_assoc As Integer
l3_assoc As Integer
l4_assoc As Integer
l1_cacheline As Integer
l2_cacheline As Integer
l3_cacheline As Integer
l4_cacheline As Integer
cpu_codename[64] As Byte
sse_size As Integer
detection_hints[16] As Byte
End Struct
Public Struct cpu_mark_t
tsc As Long
sys_clock As Long
End Struct
' int cpuid_present(void)
Private Extern cpuid_present() As Integer
' int cpuid_get_raw_data(struct cpu_raw_data_t* data)
Private Extern cpuid_get_raw_data(data As Cpu_raw_data_t) As Integer
' const char* cpuid_error(void)
Private Extern cpuid_error() As String
' int cpu_identify(struct cpu_raw_data_t* raw, struct cpu_id_t* data)
Private Extern cpu_identify(raw As Cpu_raw_data_t, data As Cpu_id_t) As Integer
' void cpu_tsc_mark(struct cpu_mark_t* mark)
Private Extern cpu_tsc_mark(mark As Cpu_mark_t)
' void cpu_tsc_unmark(struct cpu_mark_t* mark)
Private Extern cpu_tsc_unmark(mark As Cpu_mark_t)
' int cpu_clock(void)
Private Extern cpu_clock() As Integer
' int cpu_clock_by_os(void)
Private Extern cpu_clock_by_os() As Integer
' int cpu_clock_by_ic(int millis, int runs)
Private Extern cpu_clock_by_ic(millis As Integer, runs As Integer) As Integer
' int cpu_clock_measure(int millis, int quad_check)
Private Extern cpu_clock_measure(millis As Integer, quad_check As Integer) As Integer
Public Sub Main()
Dim raw As New Cpu_raw_data_t
Dim data As New Cpu_id_t
Dim mark As New Cpu_mark_t
If Not cpuid_present() Then Error.Raise("Sorry, your CPU doesn't support CPUID !")
If cpuid_get_raw_data(raw) < 0 Then
Error.Raise("Sorry, cannot get the CPUID raw data.\nError: " & cpuid_error())
Endif
If cpu_identify(raw, data) < 0 Then
Error.Raise("Sorry, CPU identification failed.\nError: " & cpuid_error())
Endif
cpu_tsc_mark(mark)
cpu_tsc_unmark(mark)
Print " \"VENDOR_STR\": "; data.vendor_str
Print " \"CPU_CODENAME\": "; data.cpu_codename
Print " \"BRAND_STR\": "; data.brand_str
Print " \"NUM_CORES\": "; data.num_cores
Print " \"NUM_LOGICAL_CPUS\": "; data.num_logical_cpus
Print " \"TOTAL_LOGICAL_CPUS\": "; data.total_logical_cpus
Print " \"FAMILY\": "; data.family
Print " \"MODEL\": "; data.model
Print " \"STEPPING\": "; data.stepping
Print " \"EXT_FAMILY\": "; data.ext_family
Print " \"EXT_MODEL\": "; data.ext_model
Print " \"CPU_CLOCK\": "; cpu_clock()
Print " \"CPU_CLOCK_BY_OS\": "; cpu_clock_by_os(); " Mhz"
Print " \"CPU_CLOCK_BY_IC\": "; cpu_clock_by_ic(25, 16); " Mhz"
Print " \"CPU_CLOCK_MEASURE\": "; cpu_clock_measure(400, 1); " Mhz"
Print " \"MARK_TSC\": "; mark.tsc
Print " \"MARK_SYS_CLOCK\": "; mark.sys_clock
EndHowever, this causes crash interpreter.Does my code cause crash ? Where (what code line) ?
Is this code you tested and works?No, I didn't test, because I didn't install that library.
If cpu_identify(raw, data) < 0 Then
Error.Raise("Sorry, CPU identification failed.\nError: " & cpuid_error())
Endif
cpu_tsc_mark(mark)
cpu_tsc_unmark(mark)Library "libcpuid:14"
Public Struct cpu_raw_data_t
basic_cpuid[32, 4] As Integer
ext_cpuid[32, 4] As Integer
intel_fn4[4, 4] As Integer
intel_fn11[4, 4] As Integer
End Struct
Public Struct cpu_mark_t
tsc As Long
sys_clock As Long
End Struct
' int cpuid_present(void)
Private Extern cpuid_present() As Integer
' int cpuid_get_raw_data(struct cpu_raw_data_t* data)
Private Extern cpuid_get_raw_data(data As Cpu_raw_data_t) As Integer
' const char* cpuid_error(void)
Private Extern cpuid_error() As String
' int cpu_identify(struct cpu_raw_data_t* raw, struct cpu_id_t* data)
Private Extern cpu_identify(raw As Cpu_raw_data_t, data As Pointer) As Integer
' void cpu_tsc_mark(struct cpu_mark_t* mark)
Private Extern cpu_tsc_mark(mark As Cpu_mark_t)
' void cpu_tsc_unmark(struct cpu_mark_t* mark)
Private Extern cpu_tsc_unmark(mark As Cpu_mark_t)
Public Sub Main()
Dim raw As New Cpu_raw_data_t
Dim data As Pointer
Dim mark As New Cpu_mark_t
If Not cpuid_present() Then Error.Raise("Sorry, your CPU doesn't support CPUID !")
If cpuid_get_raw_data(raw) < 0 Then
Error.Raise("Sorry, cannot get the CPUID raw data.\nError: " & cpuid_error())
Endif
data = Alloc(SizeOf(gb.Byte), 392)
If cpu_identify(raw, data) < 0 Then
Error.Raise("Sorry, CPU identification failed.\nError: " & cpuid_error())
Endif
cpu_tsc_mark(mark)
cpu_tsc_unmark(mark)
Free(data)
EndYou are able to execute this code?No, I am not.
Library "libcpuid:14"
Public Struct cpu_mark_t
tsc As Long
sys_clock As Long
End Struct
' int cpuid_present(void)
Private Extern cpuid_present() As Integer
' int cpuid_get_raw_data(struct cpu_raw_data_t* data)
Private Extern cpuid_get_raw_data(data As Pointer) As Integer
' const char* cpuid_error(void)
Private Extern cpuid_error() As String
' int cpu_identify(struct cpu_raw_data_t* raw, struct cpu_id_t* data)
Private Extern cpu_identify(raw As Pointer, data As Pointer) As Integer
' void cpu_tsc_mark(struct cpu_mark_t* mark)
Private Extern cpu_tsc_mark(mark As Cpu_mark_t)
' void cpu_tsc_unmark(struct cpu_mark_t* mark)
Private Extern cpu_tsc_unmark(mark As Cpu_mark_t)
Public Sub Main()
Dim raw As Pointer
Dim data As Pointer
Dim mark As New Cpu_mark_t
Print Object.SizeOf(raw)
If Not cpuid_present() Then Error.Raise("Sorry, your CPU doesn't support CPUID !")
raw = Alloc(SizeOf(gb.Byte), 1152)
If cpuid_get_raw_data(raw) < 0 Then
Error.Raise("Sorry, cannot get the CPUID raw data.\nError: " & cpuid_error())
Endif
data = Alloc(SizeOf(gb.Byte), 392)
If cpu_identify(raw, data) < 0 Then
Error.Raise("Sorry, CPU identification failed.\nError: " & cpuid_error())
Endif
cpu_tsc_mark(mark)
cpu_tsc_unmark(mark)
Free(data)
Free(raw)
EndOh, what a stupid: I have forgotten to erase that line.
2: Print Object.SizeOf(raw)
Segfault at Print Object.SizeOf(raw)
gbx3: malloc.c:2392: sysmalloc: Assertion `(old_top == initial_top (av) && old_size == 0) || ((unsigned long) (old_size) >= MINSIZE && prev_inuse (ol
d_top) && ((unsigned long) old_end & (pagesize - 1)) == 0)' failed.Can somehow solve this problem?Yes, I have to install that library on my system. ;D
Library "libcpuid:14"
Public Struct cpu_raw_data_t
basic_cpuid[32, 4] As Integer
ext_cpuid[32, 4] As Integer
intel_fn4[8, 4] As Integer
intel_fn11[4, 4] As Integer
intel_fn12h[4, 4] As Integer
intel_fn14h[4, 4] As Integer
End Struct
Public Struct cpu_sgx_t
present As Integer
max_enclave_32bit As Byte
max_enclave_64bit As Byte
flags[14] As Byte
num_epc_sections As Integer
misc_select As Integer
secs_attributes As Long
secs_xfrm As Long
End Struct
Public Struct cpu_id_t
vendor_str[16] As Byte
brand_str[64] As Byte
vendor As Integer
flags[128] As Byte
family As Integer
model As Integer
stepping As Integer
ext_family As Integer
ext_model As Integer
num_cores As Integer
num_logical_cpus As Integer
total_logical_cpus As Integer
l1_data_cache As Integer
l1_instruction_cache As Integer
l2_cache As Integer
l3_cache As Integer
l4_cache As Integer
l1_assoc As Integer
l2_assoc As Integer
l3_assoc As Integer
l4_assoc As Integer
l1_cacheline As Integer
l2_cacheline As Integer
l3_cacheline As Integer
l4_cacheline As Integer
cpu_codename[64] As Byte
sse_size As Integer
detection_hints[16] As Byte
sgx As Struct Cpu_sgx_t
End Struct
Public Struct cpu_mark_t
tsc As Long
sys_clock As Long
End Struct
' int cpuid_present(void)
' Checks if the CPUID instruction is supported.
Private Extern cpuid_present() As Integer
' int cpuid_get_raw_data(struct cpu_raw_data_t* data)
' Obtains the raw CPUID data from the current CPU.
Private Extern cpuid_get_raw_data(data As Cpu_raw_data_t) As Integer
' const char* cpuid_error(void)
' Returns textual description of the last error.
Private Extern cpuid_error() As String
' int cpu_identify(struct cpu_raw_data_t* raw, struct cpu_id_t* data)
' Identifies the CPU.
Private Extern cpu_identify(raw As Cpu_raw_data_t, data As Cpu_id_t) As Integer
' void cpu_tsc_mark(struct cpu_mark_t* mark)
' Store TSC and timing info.
Private Extern cpu_tsc_mark(mark As Cpu_mark_t)
' void cpu_tsc_unmark(struct cpu_mark_t* mark)
' Calculate TSC and timing difference.
Private Extern cpu_tsc_unmark(mark As Cpu_mark_t)
' int cpu_clock(void)
' Get the CPU clock frequency (all-in-one method).
Private Extern cpu_clock() As Integer
' int cpu_clock_by_os(void)
' Returns the CPU clock, as reported by the OS.
Private Extern cpu_clock_by_os() As Integer
' int cpu_clock_by_ic(int millis, int runs)
' Measure the CPU clock frequency using instruction-counting.
Private Extern cpu_clock_by_ic(millis As Integer, runs As Integer) As Integer
' int cpu_clock_measure(int millis, int quad_check)
' Measure the CPU clock frequency.
Private Extern cpu_clock_measure(millis As Integer, quad_check As Integer) As Integer
Public Sub Main()
Dim raw As New Cpu_raw_data_t
Dim data As New Cpu_id_t
Dim mark As New Cpu_mark_t
If Not cpuid_present() Then Error.Raise("Sorry, your CPU doesn't support CPUID !")
If cpuid_get_raw_data(raw) < 0 Then
Error.Raise("Sorry, cannot get the CPUID raw data.\nError: " & cpuid_error())
Endif
If cpu_identify(raw, data) < 0 Then
Error.Raise("Sorry, CPU identification failed.\nError: " & cpuid_error())
Endif
cpu_tsc_mark(mark)
cpu_tsc_unmark(mark)
End Print data.flags[0]
Print data.flags[1]
Print data.flags[89]printf(" \"SSE_SIZE\": \"%d bits (%s)\"\n", data.sse_size, data.detection_hints[CPU_HINT_SSE_SIZE_AUTH] ? "authoritative" : "non-authoritative");Doxygen doc: http://libcpuid.sourceforge.net/doxy/index.htmlThis documentation is very old.
Sources: https://github.com/anrieff/libcpuidThis seems ok.
Can I add you to the information about the program? About tab?I do not understand. ???
One more question. I check the flags by:I do not know it.Codice: [Seleziona]Print data.flags[0]
Print data.flags[1]
Print data.flags[89]
But how to know what the flag corresponds to the flags
- or flags [8]
And yet how it should look SSE_SIZEYes, I confirm the problem !
Print data.sse_size return me 0, in C return me 64
uint8_t flags[CPU_FLAGS_MAX]flags[124] As ByteIn my experience, however, you might have trouble by reading from those Byte[nn] type array members.
in C:Codice: [Seleziona]printf(" \"SSE_SIZE\": \"%d bits (%s)\"\n", data.sse_size, data.detection_hints[CPU_HINT_SSE_SIZE_AUTH] ? "authoritative" : "non-authoritative");
Library "libcpuid:14.0.0"
Private Enum CPU_HINT_SSE_SIZE_AUTH = 0, NUM_CPU_HINTS
Public Struct cpu_raw_data_t
basic_cpuid[32, 4] As Integer
ext_cpuid[32, 4] As Integer
intel_fn4[8, 4] As Integer
intel_fn11[4, 4] As Integer
intel_fn12h[4, 4] As Integer
intel_fn14h[4, 4] As Integer
End Struct
Public Struct cpu_sgx_t
present As Integer
max_enclave_32bit As Byte
max_enclave_64bit As Byte
flags[14] As Byte
num_epc_sections As Integer
misc_select As Integer
secs_attributes As Long
secs_xfrm As Long
End Struct
Public Struct cpu_id_t
vendor_str[16] As Byte ' 0 - 15
brand_str[64] As Byte ' 16 - 79
vendor As Integer ' 80 - 83
flags[124] As Byte ' 84 - ?
family As Integer
model As Integer
stepping As Integer
ext_family As Integer
ext_model As Integer
num_cores As Integer
num_logical_cpus As Integer
total_logical_cpus As Integer
l1_data_cache As Integer
l1_instruction_cache As Integer
l2_cache As Integer
l3_cache As Integer
l4_cache As Integer
l1_assoc As Integer
l2_assoc As Integer
l3_assoc As Integer
l4_assoc As Integer
l1_cacheline As Integer
l2_cacheline As Integer
l3_cacheline As Integer
l4_cacheline As Integer
cpu_codename[64] As Byte
sse_size As Integer
detection_hints[16] As Byte
sgx As Struct Cpu_sgx_t
End Struct
Public Struct cpu_mark_t
tsc As Long
sys_clock As Long
End Struct
' int cpuid_present(void)
' Checks if the CPUID instruction is supported.
Private Extern cpuid_present() As Integer
' int cpuid_get_raw_data(struct cpu_raw_data_t* data)
' Obtains the raw CPUID data from the current CPU.
Private Extern cpuid_get_raw_data(data As Cpu_raw_data_t) As Integer
' const char* cpuid_error(void)
' Returns textual description of the last error.
Private Extern cpuid_error() As String
' int cpu_identify(struct cpu_raw_data_t* raw, struct cpu_id_t* data)
' Identifies the CPU.
Private Extern cpu_identify(raw As Cpu_raw_data_t, data As Cpu_id_t) As Integer
' void cpu_tsc_mark(struct cpu_mark_t* mark)
' Store TSC and timing info.
Private Extern cpu_tsc_mark(mark As Cpu_mark_t)
' void cpu_tsc_unmark(struct cpu_mark_t* mark)
' Calculate TSC and timing difference.
Private Extern cpu_tsc_unmark(mark As Cpu_mark_t)
' int cpu_clock(void)
' Get the CPU clock frequency (all-in-one method).
Private Extern cpu_clock() As Integer
' int cpu_clock_by_os(void)
' Returns the CPU clock, as reported by the OS.
Private Extern cpu_clock_by_os() As Integer
' int cpu_clock_by_ic(int millis, int runs)
' Measure the CPU clock frequency using instruction-counting.
Private Extern cpu_clock_by_ic(millis As Integer, runs As Integer) As Integer
' int cpu_clock_measure(int millis, int quad_check)
' Measure the CPU clock frequency.
Private Extern cpu_clock_measure(millis As Integer, quad_check As Integer) As Integer
Public Sub Main()
Dim raw As New Cpu_raw_data_t
Dim data As New Cpu_id_t
Dim mark As New Cpu_mark_t
Dim au As String
If Not cpuid_present() Then Error.Raise("Sorry, your CPU doesn't support CPUID !")
If cpuid_get_raw_data(raw) < 0 Then
Error.Raise("Sorry, cannot get the CPUID raw data.\nError: " & cpuid_error())
Endif
If cpu_identify(raw, data) < 0 Then
Error.Raise("Sorry, CPU identification failed.\nError: " & cpuid_error())
Endif
cpu_tsc_mark(mark)
cpu_tsc_unmark(mark)
Print " \"VENDOR_STR\": "; String@(data.vendor_str.data)
Print " \"CPU_CODENAME\": "; String@(data.cpu_codename.data)
Print " \"BRAND_STR\": "; String@(data.brand_str.data)
Print " \"VENDOR\": "; data.vendor
Print " \"NUM_CORES\": "; data.num_cores
Print " \"NUM_LOGICAL_CPUS\": "; data.num_logical_cpus
Print " \"TOTAL_LOGICAL_CPUS\": "; data.total_logical_cpus
Print " \"FAMILY\": "; data.family
Print " \"MODEL\": "; data.model
Print " \"STEPPING\": "; data.stepping
Print " \"EXT_FAMILY\": "; data.ext_family
Print " \"EXT_MODEL\": "; data.ext_model
au = IIf(data.detection_hints[CPU_HINT_SSE_SIZE_AUTH], "(authoritative)", "(non-authoritative)")
Print " \"SSE_SIZE\": "; data.sse_size; " bit "; au
Print " \"CPU_CLOCK\": "; cpu_clock(); " Mhz"
Print " \"CPU_CLOCK_BY_OS\": "; cpu_clock_by_os(); " Mhz"
Print " \"CPU_CLOCK_BY_IC\": "; cpu_clock_by_ic(25, 16); " Mhz"
Print " \"CPU_CLOCK_MEASURE\": "; cpu_clock_measure(400, 1); " Mhz"
Print " \"MARK_TSC\": "; mark.tsc
Print " \"MARK_SYS_CLOCK\": "; mark.sys_clock
End /**
* contain CPU flags. Used to test for features. See
* the \ref cpu_feature_t "CPU_FEATURE_*" macros below.
* @see Features
*/
uint8_t flags[CPU_FLAGS_MAX];typedef enum {
CPU_FEATURE_FPU = 0, /*!< Floating point unit */
CPU_FEATURE_VME, /*!< Virtual mode extension */
CPU_FEATURE_DE, /*!< Debugging extension */
CPU_FEATURE_PSE, /*!< Page size extension */
CPU_FEATURE_TSC, /*!< Time-stamp counter */
CPU_FEATURE_MSR, /*!< Model-specific regsisters, RDMSR/WRMSR supported */
CPU_FEATURE_PAE, /*!< Physical address extension */
..............................................
NUM_CPU_FEATURES,
} cpu_feature_t;/**
* @brief Returns the short textual representation of a CPU flag
* @param feature - the feature, whose textual representation is wanted.
* @returns a constant string like "fpu", "tsc", "sse2", etc.
* @note the names of the returned flags are compatible with those from
* /proc/cpuinfo in Linux, with the exception of `tm_amd'
*/
const char* cpu_feature_str(cpu_feature_t feature); printf(" \"VALUE\": %s \n", data.flags[CPU_FEATURE_MMXEXT] ? "1 ," : "0 ,");for (i = 0; i < NUM_CPU_FEATURES; i++)
if (data.flags[i])
fprintf(fout, " %s", cpu_feature_str(i));
fprintf(fout, "\n");
In C look like this:If you want to use only this line and that enum value, you may set it like a Constant value. Then you can use IIf keyword:Codice: [Seleziona]printf(" \"VALUE\": %s \n", data.flags[CPU_FEATURE_MMXEXT] ? "1 ," : "0 ,");
Private Const CPU_FEATURE_MMXEXT As Integer = 55
.....
......
Print " \"VALUE\": "; IIf(data.flags[CPU_FEATURE_MMXEXT], "1 ,", "0 ,")' Gambas module file
' The module was written by vuott from http://www.gambas-it.org/
' http://www.gambas-it.org/smf/index.php?action=profile;u=402
Library "libcpuid:14.0.0"
Private Enum CPU_HINT_SSE_SIZE_AUTH = 0, NUM_CPU_HINTS
Private Enum CPU_FEATURE_FPU = 0,
CPU_FEATURE_VME,
CPU_FEATURE_DE,
CPU_FEATURE_PSE,
CPU_FEATURE_TSC,
CPU_FEATURE_MSR,
CPU_FEATURE_PAE,
CPU_FEATURE_MCE, '!< Machine check exception */
CPU_FEATURE_CX8, '!< CMPXCHG8B instruction supported */
CPU_FEATURE_APIC, '!< APIC support */
CPU_FEATURE_MTRR, '!< Memory type range registers */
CPU_FEATURE_SEP, '!< SYSENTER / SYSEXIT instructions supported */
CPU_FEATURE_PGE, '!< Page global enable */
CPU_FEATURE_MCA, '!< Machine check architecture */
CPU_FEATURE_CMOV, '!< CMOVxx instructions supported */
CPU_FEATURE_PAT, '!< Page attribute table */
CPU_FEATURE_PSE36, '!< 36-bit page address extension */
CPU_FEATURE_PN, '!< Processor serial # implemented (Intel P3 only) */
CPU_FEATURE_CLFLUSH, '!< CLFLUSH instruction supported */
CPU_FEATURE_DTS, '!< Debug store supported */
CPU_FEATURE_ACPI, '!< ACPI support (power states) */
CPU_FEATURE_MMX, '!< MMX instruction set supported */
CPU_FEATURE_FXSR, '!< FXSAVE / FXRSTOR supported */
CPU_FEATURE_SSE, '!< Streaming-SIMD Extensions (SSE) supported */
CPU_FEATURE_SSE2, '!< SSE2 instructions supported */
CPU_FEATURE_SS, '!< Self-snoop */
CPU_FEATURE_HT, '!< Hyper-threading supported (but might be disabled) */
CPU_FEATURE_TM, '!< Thermal monitor */
CPU_FEATURE_IA64, '!< IA64 supported (Itanium only) */
CPU_FEATURE_PBE, '!< Pending-break enable */
CPU_FEATURE_PNI, '!< PNI (SSE3) instructions supported */
CPU_FEATURE_PCLMUL, '!< PCLMULQDQ instruction supported */
CPU_FEATURE_DTS64, '!< 64-bit Debug store supported */
CPU_FEATURE_MONITOR, '!< MONITOR / MWAIT supported */
CPU_FEATURE_DS_CPL, '!< CPL Qualified Debug Store */
CPU_FEATURE_VMX, '!< Virtualization technology supported */
CPU_FEATURE_SMX, '!< Safer mode exceptions */
CPU_FEATURE_EST, '!< Enhanced SpeedStep */
CPU_FEATURE_TM2, '!< Thermal monitor 2 */
CPU_FEATURE_SSSE3, '!< SSSE3 instructionss supported (this is different from SSE3!) */
CPU_FEATURE_CID, '!< Context ID supported */
CPU_FEATURE_CX16, '!< CMPXCHG16B instruction supported */
CPU_FEATURE_XTPR, '!< Send Task Priority Messages disable */
CPU_FEATURE_PDCM, '!< Performance capabilities MSR supported */
CPU_FEATURE_DCA, '!< Direct cache access supported */
CPU_FEATURE_SSE4_1, '!< SSE 4.1 instructions supported */
CPU_FEATURE_SSE4_2, '!< SSE 4.2 instructions supported */
CPU_FEATURE_SYSCALL, '!< SYSCALL / SYSRET instructions supported */
CPU_FEATURE_XD, '!< Execute disable bit supported */
CPU_FEATURE_MOVBE, '!< MOVBE instruction supported */
CPU_FEATURE_POPCNT, '!< POPCNT instruction supported */
CPU_FEATURE_AES, '!< AES* instructions supported */
CPU_FEATURE_XSAVE, '!< XSAVE/XRSTOR/etc instructions supported */
CPU_FEATURE_OSXSAVE, '!< non-privileged copy of OSXSAVE supported */
CPU_FEATURE_AVX, '!< Advanced vector extensions supported */
CPU_FEATURE_MMXEXT, '!< AMD MMX-extended instructions supported */
CPU_FEATURE_3DNOW, '!< AMD 3DNow! instructions supported */
CPU_FEATURE_3DNOWEXT, '!< AMD 3DNow! extended instructions supported */
CPU_FEATURE_NX, '!< No-execute bit supported */
CPU_FEATURE_FXSR_OPT, '!< FFXSR: FXSAVE and FXRSTOR optimizations */
CPU_FEATURE_RDTSCP, '!< RDTSCP instruction supported (AMD-only) */
CPU_FEATURE_LM, '!< Long mode (x86_64/EM64T) supported */
CPU_FEATURE_LAHF_LM, '!< LAHF/SAHF supported in 64-bit mode */
CPU_FEATURE_CMP_LEGACY, '!< core multi-processing legacy mode */
CPU_FEATURE_SVM, '!< AMD Secure virtual machine */
CPU_FEATURE_ABM, '!< LZCNT instruction support */
CPU_FEATURE_MISALIGNSSE, '!< Misaligned SSE supported */
CPU_FEATURE_SSE4A, '!< SSE 4a from AMD */
CPU_FEATURE_3DNOWPREFETCH, '!< PREFETCH/PREFETCHW support */
CPU_FEATURE_OSVW, '!< OS Visible Workaround (AMD) */
CPU_FEATURE_IBS, '!< Instruction-based sampling */
CPU_FEATURE_SSE5, '!< SSE 5 instructions supported (deprecated, will never be 1) */
CPU_FEATURE_SKINIT, '!< SKINIT / STGI supported */
CPU_FEATURE_WDT, '!< Watchdog timer support */
CPU_FEATURE_TS, '!< Temperature sensor */
CPU_FEATURE_FID, '!< Frequency ID control */
CPU_FEATURE_VID, '!< Voltage ID control */
CPU_FEATURE_TTP, '!< THERMTRIP */
CPU_FEATURE_TM_AMD, '!< AMD-specified hardware thermal control */
CPU_FEATURE_STC, '!< Software thermal control */
CPU_FEATURE_100MHZSTEPS, '!< 100 MHz multiplier control */
CPU_FEATURE_HWPSTATE, '!< Hardware P-state control */
CPU_FEATURE_CONSTANT_TSC, '!< TSC ticks at constant rate */
CPU_FEATURE_XOP, '!< The XOP instruction set (same as the old CPU_FEATURE_SSE5) */
CPU_FEATURE_FMA3, '!< The FMA3 instruction set */
CPU_FEATURE_FMA4, '!< The FMA4 instruction set */
CPU_FEATURE_TBM, '!< Trailing bit manipulation instruction support */
CPU_FEATURE_F16C, '!< 16-bit FP convert instruction support */
CPU_FEATURE_RDRAND, '!< RdRand instruction */
CPU_FEATURE_X2APIC, '!< x2APIC, APIC_BASE.EXTD, MSRs 0000_0800h...0000_0BFFh 64-bit ICR (+030h but not +031h), no DFR (+00Eh), SELF_IPI (+040h) also see standard level 0000_000Bh */
CPU_FEATURE_CPB, '!< Core performance boost */
CPU_FEATURE_APERFMPERF, '!< MPERF/APERF MSRs support */
CPU_FEATURE_PFI, '!< Processor Feedback Interface support */
CPU_FEATURE_PA, '!< Processor accumulator */
CPU_FEATURE_AVX2, '!< AVX2 instructions */
CPU_FEATURE_BMI1, '!< BMI1 instructions */
CPU_FEATURE_BMI2, '!< BMI2 instructions */
CPU_FEATURE_HLE, '!< Hardware Lock Elision prefixes */
CPU_FEATURE_RTM, '!< Restricted Transactional Memory instructions */
CPU_FEATURE_AVX512F, '!< AVX-512 Foundation */
CPU_FEATURE_AVX512DQ, '!< AVX-512 Double/Quad granular insns */
CPU_FEATURE_AVX512PF, '!< AVX-512 Prefetch */
CPU_FEATURE_AVX512ER, '!< AVX-512 Exponential/Reciprocal */
CPU_FEATURE_AVX512CD, '!< AVX-512 Conflict detection */
CPU_FEATURE_SHA_NI, '!< SHA-1/SHA-256 instructions */
CPU_FEATURE_AVX512BW, '!< AVX-512 Byte/Word granular insns */
CPU_FEATURE_AVX512VL, '!< AVX-512 128/256 vector length extensions */
CPU_FEATURE_SGX, '!< SGX extensions. Non-autoritative, check cpu_id_t::sgx::present to verify presence */
CPU_FEATURE_RDSEED, '!< RDSEED instruction */
CPU_FEATURE_ADX,
NUM_CPU_FEATURES
Private Enum VENDOR_INTEL = 0, '/*!< Intel CPU */
VENDOR_AMD, '/*!< AMD CPU */
VENDOR_CYRIX, '/*!< Cyrix CPU */
VENDOR_NEXGEN, '/*!< NexGen CPU */
VENDOR_TRANSMETA, '/*!< Transmeta CPU */
VENDOR_UMC, '/*!< x86 CPU by UMC */
VENDOR_CENTAUR, '/*!< x86 CPU by IDT */
VENDOR_RISE, '/*!< x86 CPU by Rise Technology */
VENDOR_SIS, '/*!< x86 CPU by SiS */
VENDOR_NSC, '/*!< x86 CPU by National Semiconductor */
NUM_CPU_VENDORS, '/*!< Valid CPU vendor ids: 0..NUM_CPU_VENDORS - 1 */
VENDOR_UNKNOWN = -1
Public Struct cpu_list_t
num_entries As Integer
names As String
End Struct
Public Struct cpu_raw_data_t
basic_cpuid[32, 4] As Integer
ext_cpuid[32, 4] As Integer
intel_fn4[8, 4] As Integer
intel_fn11[4, 4] As Integer
intel_fn12h[4, 4] As Integer
intel_fn14h[4, 4] As Integer
End Struct
Public Struct cpu_sgx_t
present As Integer
max_enclave_32bit As Byte
max_enclave_64bit As Byte
flags[14] As Byte
num_epc_sections As Integer
misc_select As Integer
secs_attributes As Long
secs_xfrm As Long
End Struct
Public Struct cpu_id_t
vendor_str[16] As Byte ' 0 - 15
brand_str[64] As Byte ' 16 - 79
vendor As Integer ' 80 - 83
flags[124] As Byte ' 84 - ?
family As Integer
model As Integer
stepping As Integer
ext_family As Integer
ext_model As Integer
num_cores As Integer
num_logical_cpus As Integer
total_logical_cpus As Integer
l1_data_cache As Integer
l1_instruction_cache As Integer
l2_cache As Integer
l3_cache As Integer
l4_cache As Integer
l1_assoc As Integer
l2_assoc As Integer
l3_assoc As Integer
l4_assoc As Integer
l1_cacheline As Integer
l2_cacheline As Integer
l3_cacheline As Integer
l4_cacheline As Integer
cpu_codename[64] As Byte
sse_size As Integer
detection_hints[16] As Byte
sgx As Struct Cpu_sgx_t
End Struct
Public Struct cpu_mark_t
tsc As Long
sys_clock As Long
End Struct
Public Struct cpu_epc_t
start_addr As Long
length As Long
End Struct
' int cpuid_present(void)
' Checks if the CPUID instruction is supported.
Private Extern cpuid_present() As Integer
' int cpuid_get_raw_data(struct cpu_raw_data_t* data)
' Obtains the raw CPUID data from the current CPU.
Private Extern cpuid_get_raw_data(data As Cpu_raw_data_t) As Integer
'/ * *
' * @brief Returns the short textual representation Of a CPU flag
' * @param feature - the feature, whose textual representation Is Wanted.
' * @returns a constant string Like "fpu", "tsc", "sse2", etc.
' * @note the names Of the returned flags are compatible With those From
' * / proc / cpuinfo In Linux, With the exception Of `tm_amd'
' * /
'Const char * cpu_feature_str(cpu_feature_t feature);
Private Extern cpu_feature_str(cpu_feature_t As Integer) As String
' const char* cpuid_error(void)
' Returns textual description of the last error.
Private Extern cpuid_error() As String
' int cpu_identify(struct cpu_raw_data_t* raw, struct cpu_id_t* data)
' Identifies the CPU.
Private Extern cpu_identify(raw As Cpu_raw_data_t, data As Cpu_id_t) As Integer
' void cpu_tsc_mark(struct cpu_mark_t* mark)
' Store TSC and timing info.
Private Extern cpu_tsc_mark(mark As Cpu_mark_t)
' void cpu_tsc_unmark(struct cpu_mark_t* mark)
' Calculate TSC and timing difference.
Private Extern cpu_tsc_unmark(mark As Cpu_mark_t)
' int cpu_clock(void)
' Get the CPU clock frequency (all-in-one method).
Private Extern cpu_clock() As Integer
'cpu_vendor_t cpuid_get_vendor(void);
Private Extern cpuid_get_vendor() As Integer
'void cpuid_get_cpu_list(cpu_vendor_t vendor, struct cpu_list_t* list);
Private Extern cpuid_get_cpu_list(cpu_vendor_t As String, list As Cpu_list_t) As String
' int cpu_clock_by_os(void)
' Returns the CPU clock, as reported by the OS.
Private Extern cpu_clock_by_os() As Integer
' int cpu_clock_by_ic(int millis, int runs)
' Measure the CPU clock frequency using instruction-counting.
Private Extern cpu_clock_by_ic(millis As Integer, runs As Integer) As Integer
' int cpu_clock_measure(int millis, int quad_check)
' Measure the CPU clock frequency.
Private Extern cpu_clock_measure(millis As Integer, quad_check As Integer) As Integer
Public Sub Main()
Dim raw As New Cpu_raw_data_t
Dim data As New Cpu_id_t
Dim mark As New Cpu_mark_t
Dim names As New Cpu_list_t
Dim au As String
Dim i As Integer
If Not cpuid_present() Then Error.Raise("Sorry, your CPU doesn't support CPUID !")
If cpuid_get_raw_data(raw) < 0 Then
Error.Raise("Sorry, cannot get the CPUID raw data.\nError: " & cpuid_error())
Endif
If cpu_identify(raw, data) < 0 Then
Error.Raise("Sorry, CPU identification failed.\nError: " & cpuid_error())
Endif
cpu_tsc_mark(mark)
cpu_tsc_unmark(mark)
Print cpuid_get_vendor()
Print cpu_feature_str(CPU_FEATURE_VME); IIf(data.flags[CPU_FEATURE_VME], " Present", " Absent")
Print cpu_feature_str(CPU_FEATURE_DE); IIf(data.flags[CPU_FEATURE_DE], " Present", " Absent")
Print cpu_feature_str(CPU_FEATURE_SSE4_1); IIf(data.flags[CPU_FEATURE_SSE4_1], " Present", " Absent")
Print cpu_feature_str(CPU_FEATURE_SSE4_2); IIf(data.flags[CPU_FEATURE_SSE4_2], " Present", " Absent")
Print cpu_feature_str(CPU_FEATURE_3DNOWPREFETCH); IIf(data.flags[CPU_FEATURE_3DNOWPREFETCH], " Present", " Absent")
Print cpu_feature_str(CPU_FEATURE_SSE5); IIf(data.flags[CPU_FEATURE_SSE5], " Present", " Absent")
Print cpu_feature_str(CPU_FEATURE_SSE); IIf(data.flags[CPU_FEATURE_SSE], " Present", " Absent")
Print cpu_feature_str(CPU_FEATURE_SSE2); IIf(data.flags[CPU_FEATURE_SSE2], " Present", " Absent")
Print " \"VENDOR_STR\": "; String@(data.vendor_str.data)
Print " \"CPU_CODENAME\": "; String@(data.cpu_codename.data)
Print " \"BRAND_STR\": "; String@(data.brand_str.data)
Print " \"VENDOR\": "; data.vendor
Print " \"NUM_CORES\": "; data.num_cores
Print " \"NUM_LOGICAL_CPUS\": "; data.num_logical_cpus
Print " \"TOTAL_LOGICAL_CPUS\": "; data.total_logical_cpus
Print " \"FAMILY\": "; data.family
Print " \"MODEL\": "; data.model
Print " \"STEPPING\": "; data.stepping
Print " \"EXT_FAMILY\": "; data.ext_family
Print " \"EXT_MODEL\": "; data.ext_model
au = IIf(data.detection_hints[CPU_HINT_SSE_SIZE_AUTH], "(authoritative)", "(non-authoritative)")
Print " \"SSE_SIZE\": "; data.sse_size; " bit "; au
Print " \"CPU_CLOCK\": "; cpu_clock(); " Mhz"
Print " \"CPU_CLOCK_BY_OS\": "; cpu_clock_by_os(); " Mhz"
Print " \"CPU_CLOCK_BY_IC\": "; cpu_clock_by_ic(25, 16); " Mhz"
Print " \"CPU_CLOCK_MEASURE\": "; cpu_clock_measure(400, 1); " Mhz"
Print " \"L1_DATA_CACHE\": "; data.l1_data_cache; " KB"
Print " \"L1_INSTRUCTION_CACHE\": "; data.l1_instruction_cache; " KB"
Print " \"L1_CACHELINE\": "; data.l1_cacheline; " bytes"
Print " \"L1_ASSOC\": "; data.l1_assoc; "-way"
Print " \"L2_CACHE\": "; data.l2_cache; " KB"
Print " \"L2_ASSOC\": "; data.l2_assoc; "-way"
Print " \"L2_CACHELINE\": "; data.l2_cacheline; " bytes"
Print " \"L3_CACHE\": "; data.l3_cache; " KB"
Print " \"L3_ASSOC\": "; data.l3_assoc; "-way"
Print " \"L3_CACHELINE\": "; data.l3_cacheline; " bytes"
Print " \"L4_CACHE\": "; data.l4_cache; " KB"
Print " \"L4_ASSOC\": "; data.l4_assoc; "-way"
Print " \"L4_CACHELINE\": "; data.l4_cacheline; " bytes"
Print " \"MARK_TSC\": "; mark.tsc
Print " \"MARK_SYS_CLOCK\": "; mark.sys_clock
End
...but does not work correctly.Hic et nunc I don't know, but I suggest you to take a look - by using a Pointer - at memory part of cpu_id_t structure (from index byte 84 to 211) dedicated to the Flags and check it.
Library "libcpuid:14.0.0"
Public Struct cpu_raw_data_t
basic_cpuid[32, 4] As Integer
ext_cpuid[32, 4] As Integer
intel_fn4[8, 4] As Integer
intel_fn11[4, 4] As Integer
intel_fn12h[4, 4] As Integer
intel_fn14h[4, 4] As Integer
End Struct
Public Struct cpu_sgx_t
present As Integer
max_enclave_32bit As Byte
max_enclave_64bit As Byte
flags[14] As Byte
num_epc_sections As Integer
misc_select As Integer
secs_attributes As Long
secs_xfrm As Long
End Struct
' int cpuid_present(void)
' Checks if the CPUID instruction is supported.
Private Extern cpuid_present() As Integer
' int cpuid_get_raw_data(struct cpu_raw_data_t* data)
' Obtains the raw CPUID data from the current CPU.
Private Extern cpuid_get_raw_data(data As Cpu_raw_data_t) As Integer
' const char* cpuid_error(void)
' Returns textual description of the last error.
Private Extern cpuid_error() As String
' int cpu_identify(struct cpu_raw_data_t* raw, struct cpu_id_t* data)
' Identifies the CPU.
Private Extern cpu_identify(raw As Cpu_raw_data_t, data As Pointer) As Integer
Public Sub Main()
Dim raw As New Cpu_raw_data_t
Dim data As Pointer
Dim i As Integer
If Not cpuid_present() Then Error.Raise("Sorry, your CPU doesn't support CPUID !")
If cpuid_get_raw_data(raw) < 0 Then
Error.Raise("Sorry, cannot get the CPUID raw data.\nError: " & cpuid_error())
Endif
' We allocate an area of memory equal to the total size of "cpu_id_t" structure:'
data = Alloc(SizeOf(gb.Byte), 432)
' "cpu_identify( )" function identifies our CPU and instantiates the allocated memory area with the CPU data:'
If cpu_identify(raw, data) < 0 Then
Error.Raise("Sorry, CPU identification failed.\nError: " & cpuid_error())
Endif
' We get and check the values of every byte from index 84 to index 211 of that allocated memory area, correspondents to the member "uint8_t flags[CPU_FLAGS_MAX]":'
For i = 84 To 211
Print i, Byte@(data + i)
Next
' Finally we deallocate the memory portion previously allocated:'
Free(data)
End0 1
1 1
2 1
3 1
4 1
5 1
6 1
7 1
8 1
9 1
10 1
11 1
12 1
13 1
14 1
15 1
16 1
17 0
18 1
19 0
20 0
21 1
22 1
23 1
24 1
25 0
26 1
27 0
28 0
29 0
30 1
31 0
32 0
33 0
34 0
35 0
36 0
37 0
38 0
39 0
40 0
41 1
42 0
43 0
44 0
45 0
46 0
47 1
48 0
49 0
50 0
51 0
52 0
53 0
54 0
55 1
56 1
57 1
58 1
59 1
60 1
61 1
62 1
63 1
64 1
65 0
66 0
67 0
68 1
69 0
70 0
71 0
72 0
73 0
74 1
75 1
76 1
77 1
78 1
79 1
80 1
81 0
82 0
83 0
84 0
85 0
86 0
87 0
88 0
89 0
90 0
91 0
92 0
93 0
94 0
95 0
96 0
97 0
98 0
99 0
100 0
101 0
102 0
103 0
104 0
105 0
106 0
107 0
108 0
109 0
110 0
111 0
112 0
113 0
114 0
115 0
116 0
117 0
118 0
119 0
120 0
121 0
122 0
123 0
124 0
125 0
126 0
127 0
0 1
1 1
2 1
3 1
4 1
5 1
6 1
7 1
8 1
9 1
10 1
11 1
12 1
13 0
14 1
15 0
16 0
17 1
18 1
19 1
20 1
21 0
22 1
23 0
24 0
25 0
26 1
27 0
28 0
29 0
30 0
31 0
32 0
33 0
34 0
35 0
36 0
37 1
38 0
39 0
40 0
41 0
42 0
43 1
44 0
45 0
46 0
47 0
48 0
49 0
50 0
51 1
52 1
53 1
54 1
55 1
56 1
57 1
58 1
59 1
60 1
61 0
62 0
63 0
64 1
65 0
66 0
67 0
68 0
69 0
70 1
71 1
72 1
73 1
74 1
75 1
76 1
77 0
78 0
79 0
80 0
81 0
82 0
83 0
84 0
85 0
86 0
87 0
88 0
89 0
90 0
91 0
92 0
93 0
94 0
95 0
96 0
97 0
98 0
99 0
100 0
101 0
102 0
103 0
104 0
105 0
106 0
107 0
108 0
109 0
110 0
111 0
112 0
113 0
114 0
115 0
116 0
117 0
118 0
119 0
120 0
121 0
122 0
123 0
124 15
125 0
126 0
127 0
So i must use Dim data As Pointer, not as cpu_id_tIf we want to use allocated memory area, we have to identify the bytes where each member of that Structure begins.
Print int@(data + 212)and for flagsIn C declaration of cpu_id_t Structure the flags member is a 1-byte values array.
Dim data_flags As Pointer?
' Gambas module file
' The module was written by vuott from http://www.gambas-it.org/
' http://www.gambas-it.org/smf/index.php?action=profile;u=402
Library "libcpuid:14.0.0"
Private Enum CPU_HINT_SSE_SIZE_AUTH = 0, NUM_CPU_HINTS
Private Enum CPU_FEATURE_FPU,
CPU_FEATURE_VME,
CPU_FEATURE_DE,
CPU_FEATURE_PSE,
CPU_FEATURE_TSC,
CPU_FEATURE_MSR,
CPU_FEATURE_PAE,
CPU_FEATURE_MCE, '!< Machine check exception */
CPU_FEATURE_CX8, '!< CMPXCHG8B instruction supported */
CPU_FEATURE_APIC, '!< APIC support */
CPU_FEATURE_MTRR, '!< Memory type range registers */
CPU_FEATURE_SEP, '!< SYSENTER / SYSEXIT instructions supported */
CPU_FEATURE_PGE, '!< Page global enable */
CPU_FEATURE_MCA, '!< Machine check architecture */
CPU_FEATURE_CMOV, '!< CMOVxx instructions supported */
CPU_FEATURE_PAT, '!< Page attribute table */
CPU_FEATURE_PSE36, '!< 36-bit page address extension */
CPU_FEATURE_PN, '!< Processor serial # implemented (Intel P3 only) */
CPU_FEATURE_CLFLUSH, '!< CLFLUSH instruction supported */
CPU_FEATURE_DTS, '!< Debug store supported */
CPU_FEATURE_ACPI, '!< ACPI support (power states) */
CPU_FEATURE_MMX, '!< MMX instruction set supported */
CPU_FEATURE_FXSR, '!< FXSAVE / FXRSTOR supported */
CPU_FEATURE_SSE, '!< Streaming-SIMD Extensions (SSE) supported */
CPU_FEATURE_SSE2, '!< SSE2 instructions supported */
CPU_FEATURE_SS, '!< Self-snoop */
CPU_FEATURE_HT, '!< Hyper-threading supported (but might be disabled) */
CPU_FEATURE_TM, '!< Thermal monitor */
CPU_FEATURE_IA64, '!< IA64 supported (Itanium only) */
CPU_FEATURE_PBE, '!< Pending-break enable */
CPU_FEATURE_PNI, '!< PNI (SSE3) instructions supported */
CPU_FEATURE_PCLMUL, '!< PCLMULQDQ instruction supported */
CPU_FEATURE_DTS64, '!< 64-bit Debug store supported */
CPU_FEATURE_MONITOR, '!< MONITOR / MWAIT supported */
CPU_FEATURE_DS_CPL, '!< CPL Qualified Debug Store */
CPU_FEATURE_VMX, '!< Virtualization technology supported */
CPU_FEATURE_SMX, '!< Safer mode exceptions */
CPU_FEATURE_EST, '!< Enhanced SpeedStep */
CPU_FEATURE_TM2, '!< Thermal monitor 2 */
CPU_FEATURE_SSSE3, '!< SSSE3 instructionss supported (this is different from SSE3!) */
CPU_FEATURE_CID, '!< Context ID supported */
CPU_FEATURE_CX16, '!< CMPXCHG16B instruction supported */
CPU_FEATURE_XTPR, '!< Send Task Priority Messages disable */
CPU_FEATURE_PDCM, '!< Performance capabilities MSR supported */
CPU_FEATURE_DCA, '!< Direct cache access supported */
CPU_FEATURE_SSE4_1, '!< SSE 4.1 instructions supported */
CPU_FEATURE_SSE4_2, '!< SSE 4.2 instructions supported */
CPU_FEATURE_SYSCALL, '!< SYSCALL / SYSRET instructions supported */
CPU_FEATURE_XD, '!< Execute disable bit supported */
CPU_FEATURE_MOVBE, '!< MOVBE instruction supported */
CPU_FEATURE_POPCNT, '!< POPCNT instruction supported */
CPU_FEATURE_AES, '!< AES* instructions supported */
CPU_FEATURE_XSAVE, '!< XSAVE/XRSTOR/etc instructions supported */
CPU_FEATURE_OSXSAVE, '!< non-privileged copy of OSXSAVE supported */
CPU_FEATURE_AVX, '!< Advanced vector extensions supported */
CPU_FEATURE_MMXEXT, '!< AMD MMX-extended instructions supported */
CPU_FEATURE_3DNOW, '!< AMD 3DNow! instructions supported */
CPU_FEATURE_3DNOWEXT, '!< AMD 3DNow! extended instructions supported */
CPU_FEATURE_NX, '!< No-execute bit supported */
CPU_FEATURE_FXSR_OPT, '!< FFXSR: FXSAVE and FXRSTOR optimizations */
CPU_FEATURE_RDTSCP, '!< RDTSCP instruction supported (AMD-only) */
CPU_FEATURE_LM, '!< Long mode (x86_64/EM64T) supported */
CPU_FEATURE_LAHF_LM, '!< LAHF/SAHF supported in 64-bit mode */
CPU_FEATURE_CMP_LEGACY, '!< core multi-processing legacy mode */
CPU_FEATURE_SVM, '!< AMD Secure virtual machine */
CPU_FEATURE_ABM, '!< LZCNT instruction support */
CPU_FEATURE_MISALIGNSSE, '!< Misaligned SSE supported */
CPU_FEATURE_SSE4A, '!< SSE 4a from AMD */
CPU_FEATURE_3DNOWPREFETCH, '!< PREFETCH/PREFETCHW support */
CPU_FEATURE_OSVW, '!< OS Visible Workaround (AMD) */
CPU_FEATURE_IBS, '!< Instruction-based sampling */
CPU_FEATURE_SSE5, '!< SSE 5 instructions supported (deprecated, will never be 1) */
CPU_FEATURE_SKINIT, '!< SKINIT / STGI supported */
CPU_FEATURE_WDT, '!< Watchdog timer support */
CPU_FEATURE_TS, '!< Temperature sensor */
CPU_FEATURE_FID, '!< Frequency ID control */
CPU_FEATURE_VID, '!< Voltage ID control */
CPU_FEATURE_TTP, '!< THERMTRIP */
CPU_FEATURE_TM_AMD, '!< AMD-specified hardware thermal control */
CPU_FEATURE_STC, '!< Software thermal control */
CPU_FEATURE_100MHZSTEPS, '!< 100 MHz multiplier control */
CPU_FEATURE_HWPSTATE, '!< Hardware P-state control */
CPU_FEATURE_CONSTANT_TSC, '!< TSC ticks at constant rate */
CPU_FEATURE_XOP, '!< The XOP instruction set (same as the old CPU_FEATURE_SSE5) */
CPU_FEATURE_FMA3, '!< The FMA3 instruction set */
CPU_FEATURE_FMA4, '!< The FMA4 instruction set */
CPU_FEATURE_TBM, '!< Trailing bit manipulation instruction support */
CPU_FEATURE_F16C, '!< 16-bit FP convert instruction support */
CPU_FEATURE_RDRAND, '!< RdRand instruction */
CPU_FEATURE_X2APIC, '!< x2APIC, APIC_BASE.EXTD, MSRs 0000_0800h...0000_0BFFh 64-bit ICR (+030h but not +031h), no DFR (+00Eh), SELF_IPI (+040h) also see standard level 0000_000Bh */
CPU_FEATURE_CPB, '!< Core performance boost */
CPU_FEATURE_APERFMPERF, '!< MPERF/APERF MSRs support */
CPU_FEATURE_PFI, '!< Processor Feedback Interface support */
CPU_FEATURE_PA, '!< Processor accumulator */
CPU_FEATURE_AVX2, '!< AVX2 instructions */
CPU_FEATURE_BMI1, '!< BMI1 instructions */
CPU_FEATURE_BMI2, '!< BMI2 instructions */
CPU_FEATURE_HLE, '!< Hardware Lock Elision prefixes */
CPU_FEATURE_RTM, '!< Restricted Transactional Memory instructions */
CPU_FEATURE_AVX512F, '!< AVX-512 Foundation */
CPU_FEATURE_AVX512DQ, '!< AVX-512 Double/Quad granular insns */
CPU_FEATURE_AVX512PF, '!< AVX-512 Prefetch */
CPU_FEATURE_AVX512ER, '!< AVX-512 Exponential/Reciprocal */
CPU_FEATURE_AVX512CD, '!< AVX-512 Conflict detection */
CPU_FEATURE_SHA_NI, '!< SHA-1/SHA-256 instructions */
CPU_FEATURE_AVX512BW, '!< AVX-512 Byte/Word granular insns */
CPU_FEATURE_AVX512VL, '!< AVX-512 128/256 vector length extensions */
CPU_FEATURE_SGX, '!< SGX extensions. Non-autoritative, check cpu_id_t::sgx::present to verify presence */
CPU_FEATURE_RDSEED, '!< RDSEED instruction */
CPU_FEATURE_ADX,
NUM_CPU_FEATURES
Private Enum VENDOR_INTEL = 0, '/*!< Intel CPU */
VENDOR_AMD, '/*!< AMD CPU */
VENDOR_CYRIX, '/*!< Cyrix CPU */
VENDOR_NEXGEN, '/*!< NexGen CPU */
VENDOR_TRANSMETA, '/*!< Transmeta CPU */
VENDOR_UMC, '/*!< x86 CPU by UMC */
VENDOR_CENTAUR, '/*!< x86 CPU by IDT */
VENDOR_RISE, '/*!< x86 CPU by Rise Technology */
VENDOR_SIS, '/*!< x86 CPU by SiS */
VENDOR_NSC, '/*!< x86 CPU by National Semiconductor */
NUM_CPU_VENDORS, '/*!< Valid CPU vendor ids: 0..NUM_CPU_VENDORS - 1 */
VENDOR_UNKNOWN = -1
Public Struct cpu_list_t
num_entries As Integer
names As String
End Struct
Public Struct cpu_raw_data_t
basic_cpuid[32, 4] As Integer
ext_cpuid[32, 4] As Integer
intel_fn4[8, 4] As Integer
intel_fn11[4, 4] As Integer
intel_fn12h[4, 4] As Integer
intel_fn14h[4, 4] As Integer
End Struct
Public Struct cpu_sgx_t
present As Integer
max_enclave_32bit As Byte
max_enclave_64bit As Byte
flags[14] As Byte
num_epc_sections As Integer
misc_select As Integer
secs_attributes As Long
secs_xfrm As Long
End Struct
Public Struct cpu_id_t
vendor_str[16] As Byte ' 0 - 15
brand_str[64] As Byte ' 16 - 79
vendor As Integer ' 80 - 83
flags[124] As Byte ' 84 - 211
family As Integer ' 212 - 215
model As Integer ' 216 - 219
stepping As Integer ' 220 - 223
ext_family As Integer ' 224 - 227
ext_model As Integer ' 228 - 231
num_cores As Integer ' 232 - 235
num_logical_cpus As Integer ' 236 - 239
total_logical_cpus As Integer ' 240 - 243
l1_data_cache As Integer ' 244 - 247
l1_instruction_cache As Integer ' 248 - 251
l2_cache As Integer ' 252 - 255
l3_cache As Integer ' 256 - 259
l4_cache As Integer ' 260 - 263
l1_assoc As Integer ' 264 - 267
l2_assoc As Integer ' 268 - 271
l3_assoc As Integer ' 272 - 275
l4_assoc As Integer ' 276 - 279
l1_cacheline As Integer ' 280 - 283
l2_cacheline As Integer ' 284 - 287
l3_cacheline As Integer ' 288 - 291
l4_cacheline As Integer ' 292 - 295
cpu_codename[64] As Byte ' 296 - 359
sse_size As Integer ' 360 - 363
detection_hints[16] As Byte ' 364 - 379
sgx As Struct Cpu_sgx_t ' 380 - 431
End Struct
Public Struct cpu_mark_t
tsc As Long
sys_clock As Long
End Struct
Public Struct cpu_epc_t
start_addr As Long
length As Long
End Struct
' int cpuid_present(void)
' Checks if the CPUID instruction is supported.
Private Extern cpuid_present() As Integer
' int cpuid_get_raw_data(struct cpu_raw_data_t* data)
' Obtains the raw CPUID data from the current CPU.
Private Extern cpuid_get_raw_data(data As Cpu_raw_data_t) As Integer
'/ * *
' * @brief Returns the short textual representation Of a CPU flag
' * @param feature - the feature, whose textual representation Is Wanted.
' * @returns a constant string Like "fpu", "tsc", "sse2", etc.
' * @note the names Of the returned flags are compatible With those From
' * / proc / cpuinfo In Linux, With the exception Of `tm_amd'
' * /
'Const char * cpu_feature_str(cpu_feature_t feature);
Private Extern cpu_feature_str(cpu_feature_t As Integer) As String
' const char* cpuid_error(void)
' Returns textual description of the last error.
Private Extern cpuid_error() As String
' int cpu_identify(struct cpu_raw_data_t* raw, struct cpu_id_t* data)
' Identifies the CPU.
Private Extern cpu_identify(raw As Cpu_raw_data_t, data As Cpu_id_t) As Integer
' void cpu_tsc_mark(struct cpu_mark_t* mark)
' Store TSC and timing info.
Private Extern cpu_tsc_mark(mark As Cpu_mark_t)
' void cpu_tsc_unmark(struct cpu_mark_t* mark)
' Calculate TSC and timing difference.
Private Extern cpu_tsc_unmark(mark As Cpu_mark_t)
' int cpu_clock(void)
' Get the CPU clock frequency (all-in-one method).
Private Extern cpu_clock() As Integer
'cpu_vendor_t cpuid_get_vendor(void);
Private Extern cpuid_get_vendor() As Integer
'void cpuid_get_cpu_list(cpu_vendor_t vendor, struct cpu_list_t* list);
Private Extern cpuid_get_cpu_list(cpu_vendor_t As String, list As Cpu_list_t) As String
' int cpu_clock_by_os(void)
' Returns the CPU clock, as reported by the OS.
Private Extern cpu_clock_by_os() As Integer
' int cpu_clock_by_ic(int millis, int runs)
' Measure the CPU clock frequency using instruction-counting.
Private Extern cpu_clock_by_ic(millis As Integer, runs As Integer) As Integer
' int cpu_clock_measure(int millis, int quad_check)
' Measure the CPU clock frequency.
Private Extern cpu_clock_measure(millis As Integer, quad_check As Integer) As Integer
Public Sub Main()
Dim raw As New Cpu_raw_data_t
Dim data As New Cpu_id_t
Dim mark As New Cpu_mark_t
Dim names As New Cpu_list_t
Dim au As String
Dim dataflags As Pointer
Dim i As Integer
If Not cpuid_present() Then Error.Raise("Sorry, your CPU doesn't support CPUID !")
dataflags = Alloc(SizeOf(gb.Byte), 432)
If cpuid_get_raw_data(raw) < 0 Then
Error.Raise("Sorry, cannot get the CPUID raw data.\nError: " & cpuid_error())
Endif
If cpu_identify(raw, data) < 0 Then
Error.Raise("Sorry, CPU identification failed.\nError: " & cpuid_error())
Endif
If cpu_identify(raw, dataflags) < 0 Then
Error.Raise("Sorry, CPU identification failed.\nError: " & cpuid_error())
Endif
cpu_tsc_mark(mark)
cpu_tsc_unmark(mark)
Print " \"VENDOR_STR\": "; String@(data.vendor_str.data)
Print " \"CPU_CODENAME\": "; String@(data.cpu_codename.data)
Print " \"BRAND_STR\": "; String@(data.brand_str.data)
Print " \"VENDOR\": "; data.vendor
Print " \"NUM_CORES\": "; data.num_cores
Print " \"NUM_LOGICAL_CPUS\": "; data.num_logical_cpus
Print " \"TOTAL_LOGICAL_CPUS\": "; data.total_logical_cpus
Print " \"FAMILY\": "; data.family
Print " \"MODEL\": "; data.model
Print " \"STEPPING\": "; data.stepping
Print " \"EXT_FAMILY\": "; data.ext_family
Print " \"EXT_MODEL\": "; data.ext_model
au = IIf(data.detection_hints[CPU_HINT_SSE_SIZE_AUTH], "(authoritative)", "(non-authoritative)")
Print " \"SSE_SIZE\": "; data.sse_size; " bit "; au
Print " \"CPU_CLOCK\": "; cpu_clock(); " Mhz"
Print " \"CPU_CLOCK_BY_OS\": "; cpu_clock_by_os(); " Mhz"
Print " \"CPU_CLOCK_BY_IC\": "; cpu_clock_by_ic(25, 16); " Mhz"
Print " \"CPU_CLOCK_MEASURE\": "; cpu_clock_measure(400, 1); " Mhz"
Print " \"L1_DATA_CACHE\": "; data.l1_data_cache; " KB"
Print " \"L1_INSTRUCTION_CACHE\": "; data.l1_instruction_cache; " KB"
Print " \"L1_CACHELINE\": "; data.l1_cacheline; " bytes"
Print " \"L1_ASSOC\": "; data.l1_assoc; "-way"
Print " \"L2_CACHE\": "; data.l2_cache; " KB"
Print " \"L2_ASSOC\": "; data.l2_assoc; "-way"
Print " \"L2_CACHELINE\": "; data.l2_cacheline; " bytes"
Print " \"L3_CACHE\": "; data.l3_cache; " KB"
Print " \"L3_ASSOC\": "; data.l3_assoc; "-way"
Print " \"L3_CACHELINE\": "; data.l3_cacheline; " bytes"
Print " \"L4_CACHE\": "; data.l4_cache; " KB"
Print " \"L4_ASSOC\": "; data.l4_assoc; "-way"
Print " \"L4_CACHELINE\": "; data.l4_cacheline; " bytes"
Print " \"MARK_TSC\": "; mark.tsc
Print " \"MARK_SYS_CLOCK\": "; mark.sys_clock
For i = 0 To 109
Print " \"FEATURE\": "; cpu_feature_str(i); IIf(Byte@(dataflags + (i + 84)), " Present", " Absent")
Next
Free(dataflags)
End
Library "libcpuid:14.0.0"
Public Struct cpu_raw_data_t
basic_cpuid[32, 4] As Integer
ext_cpuid[32, 4] As Integer
intel_fn4[8, 4] As Integer
intel_fn11[4, 4] As Integer
intel_fn12h[4, 4] As Integer
intel_fn14h[4, 4] As Integer
End Struct
Public Struct cpu_mark_t
tsc As Long
sys_clock As Long
End Struct
' int cpuid_present(void)
' Checks if the CPUID instruction is supported.
Private Extern cpuid_present() As Integer
' int cpuid_get_raw_data(struct cpu_raw_data_t* data)
' Obtains the raw CPUID data from the current CPU.
Private Extern cpuid_get_raw_data(data As Cpu_raw_data_t) As Integer
' const char* cpuid_error(void)
' Returns textual description of the last error.
Private Extern cpuid_error() As String
' int cpu_identify(struct cpu_raw_data_t* raw, struct cpu_id_t* data)
' Identifies the CPU.
Private Extern cpu_identify(raw As Cpu_raw_data_t, data As Pointer) As Integer
' void cpu_tsc_mark(struct cpu_mark_t* mark)
' Store TSC and timing info.
Private Extern cpu_tsc_mark(mark As Cpu_mark_t)
' void cpu_tsc_unmark(struct cpu_mark_t* mark)
' Calculate TSC and timing difference.
Private Extern cpu_tsc_unmark(mark As Cpu_mark_t)
' int cpu_clock(void)
' Get the CPU clock frequency (all-in-one method).
Private Extern cpu_clock() As Integer
' int cpu_clock_by_os(void)
' Returns the CPU clock, as reported by the OS.
Private Extern cpu_clock_by_os() As Integer
' int cpu_clock_by_ic(int millis, int runs)
' Measure the CPU clock frequency using instruction-counting.
Private Extern cpu_clock_by_ic(millis As Integer, runs As Integer) As Integer
' int cpu_clock_measure(int millis, int quad_check)
' Measure the CPU clock frequency.
Private Extern cpu_clock_measure(millis As Integer, quad_check As Integer) As Integer
' const char * cpu_feature_str(cpu_feature_t feature)
' Returns the short textual representation Of a CPU flag.
Private Extern cpu_feature_str(feature As Integer) As String
Public Sub Main()
Dim raw As New Cpu_raw_data_t
Dim data As Pointer
Dim mark As New Cpu_mark_t
Dim au As String
Dim cpu_vendor As String[]
Dim i As Integer
cpu_vendor = ["Intel CPU", "AMD CPU", "Cyrix CPU", "NexGen CPU", "Transmeta CPU", "x86 CPU by UMC", "x86 CPU by IDT",
"x86 CPU by Rise Technology", "x86 CPU by SiS", "x86 CPU by National Semiconductor", ""]
If Not cpuid_present() Then Error.Raise("La CPUID non è supportata !")
If cpuid_get_raw_data(raw) < 0 Then
Error.Raise("Impossibile ottenere dati grezzi CPUID !\nError: " & cpuid_error())
Endif
data = Alloc(SizeOf(gb.Byte), 432)
If cpu_identify(raw, data) < 0 Then
Error.Raise("Impossibile identificare la CPU !\nError: " & cpuid_error())
Endif
cpu_tsc_mark(mark)
cpu_tsc_unmark(mark)
Print " \"VENDOR_STR\": "; String@(data)
Print " \"CPU_CODENAME\": "; String@(data + 296)
Print " \"BRAND_STR\": "; String@(data + 16)
Print " \"VENDOR\": "; IIf(Int@(data + 80) = -1, "sconosciuto", cpu_vendor[Int@(data + 80)])
Print " \"FAMILY\": "; Int@(data + 212)
Print " \"MODEL\": "; Int@(data + 216)
Print " \"STEPPING\": "; Int@(data + 220)
Print " \"EXT_FAMILY\": "; Int@(data + 224)
Print " \"EXT_MODEL\": "; Int@(data + 228)
Print " \"NUM_CORES\": "; Int@(data + 232)
Print " \"NUM_LOGICAL_CPUS\": "; Int@(data + 236)
Print " \"TOTAL_LOGICAL_CPUS\": "; Int@(data + 240)
Print " \"L1_DATA_CACHE\": "; Int@(data + 244); " KB"
Print " \"L1_INSTRUCTION_CACHE\": "; Int@(data + 248); " KB"
Print " \"L2_CACHE\": "; Int@(data + 252); " KB"
Print " \"L3_CACHE\": "; Int@(data + 256); " KB"
Print " \"L4_CACHE\": "; Int@(data + 260); " KB"
Print " \"L1_ASSOC\": "; IIf(Int@(data + 264) > 0, Int@(data + 264) & "-way", "intedeterminato")
Print " \"L2_ASSOC\": "; IIf(Int@(data + 268) > 0, Int@(data + 268) & "-way", "intedeterminato")
Print " \"L3_ASSOC\": "; IIf(Int@(data + 272) > 0, Int@(data + 272) & "-way", "intedeterminato")
Print " \"L4_ASSOC\": "; IIf(Int@(data + 276) > 0, Int@(data + 276) & "-way", "intedeterminato")
Print " \"L1_CACHELINE\": "; IIf(Int@(data + 280) > 0, Int@(data + 280) & " byte", "intedeterminato")
Print " \"L2_CACHELINE\": "; IIf(Int@(data + 284) > 0, Int@(data + 280) & " byte", "intedeterminato")
Print " \"L3_CACHELINE\": "; IIf(Int@(data + 288) > 0, Int@(data + 280) & " byte", "intedeterminato")
Print " \"L4_CACHELINE\": "; IIf(Int@(data + 292) > 0, Int@(data + 280) & " byte", "intedeterminato")
au = IIf(Byte@(data + 364), "(authoritative)", "(non-authoritative)")
Print " \"SSE_SIZE\": "; Int@(data + 360); " bit "; au
Print " \"CPU_CLOCK\": "; cpu_clock(); " Mhz"
Print " \"CPU_CLOCK_BY_OS\": "; cpu_clock_by_os(); " Mhz"
Print " \"CPU_CLOCK_BY_IC\": "; cpu_clock_by_ic(25, 16); " Mhz"
Print " \"CPU_CLOCK_MEASURE\": "; cpu_clock_measure(400, 1); " Mhz"
Print " \"MARK_TSC\": "; mark.tsc
Print " \"MARK_SYS_CLOCK\": "; "µs "; mark.sys_clock
For i = 0 To 109
Print " \"FEATURE\": "; cpu_feature_str(i); IIf(Byte@(data + (i + 84)), " Present", " Absent")
Next
Free(data)
EndCurrently, the libcpuid 16 library introduces a lot of changes...Sorry, but, to do the test, my system only allows me to have libcpuid version 15.